| 摘要 |
<p>An A/D converter of this invention includes a first A/D converter (13) for A/D-converting the input signal (Vin) and determining upper bits (a bits) of the n-bit binary code, first and second sample-hold circuits (15a, 15b), which are alternately switched each time the first A/D converter samples the analog input signal, for sampling and holding the analog input signal, in synchronism with a sampling timing of the first A/D converter (13), and a second A/D converter (14). The second A/D converter (14) is constituted by a reference voltage generator (11b) for generating reference voltages based on contents of the binary code (D13) obtained by the first A/D converter (13), a voltage comparator (21) for comparing the reference voltage (Vref) with a voltage value of the analog input signal (V15a or V15b) held in one of the first and second sample-hold circuits, which sample and hold the analog input signal (Vin) corresponding to the binary code (D13), and an encoder (12b) for encoding a comparison result (V21) output from the voltage comparator (21) and determining lower bits (b bits) of the n bits.</p> |
