发明名称 MEMORY DEVICE
摘要 PURPOSE:To accelerate write speed, by driving a control line by using a memory unit cell, and writing a bit of information via a bit line. CONSTITUTION:By inputting information which indicate a word line 30 as activation start position information 18 and 19, and the information which indicate a word line 32 as activation terminate position information 20 and 21, a successive selector circuit 17 activates the word lines 30-31. Simultaneously, by inputting the information which indicate a partial write control line 48 as activation start position information 35 and 36, and the information which indicate a partial write control line 50 as activation terminate position information 37 and 38, a successive selector circuit 34 activates the partial write control lines 48-50. Therefore, it is possible to write the information on the memory unit cells 2-4, 6-8, and 10-12 simultaneously, and the information on the bit lines 52-54 are written respectively.
申请公布号 JPS63213197(A) 申请公布日期 1988.09.06
申请号 JP19870045344 申请日期 1987.03.02
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 YAMAGUCHI RYOICHI;INOUE JUNJI
分类号 G11C11/401;G11C11/34 主分类号 G11C11/401
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