发明名称 Schaltungsanordnung zum Vergleich einer Bezugsfrequenz-Impulsfolge mit einer Signalfrequenz-Impulsfolge
摘要 1,155,871. Automatic speed control. SEQUENTIAL ELECTRONIC SYSTEMS Inc. July 5, 1966 [July 6, 1965], No.30070/66. Heading G3R. [Also in Division H3] A unit 10 compares the frequency and phase of a train of reference pulses R with a train of pulses S whose repetition rate represents the speed of an electric motor, the output C of flipflop 26 being used to apply power to the motor being controlled. If flip-flops 24, 26 are in the states A, D, respectively, the motor being underspeed, then the first R pulse will be passed by gate 16, after a delay due to circuit 12, to switch flip-flop 24 into state B. This opens gate 20 so that the next R pulse switches the flip-flop 26 to state C for increasing the speed of the motor. The first S pulse is delayed by circuit 14 and is passed by gate 22 to switch flip-flop 26 to its D state, so removing power from the motor. Gate 18 is not opened, and the state of the flip-flop 24 is unchanged. As the motor is still underspeed, the next R pulse switches the flip-flop back to its power state, and, as the motor accelerates, the increasing frequency of S pulses causes a gradual reduction in the power applied to the motor. At full-speed, the pulses R, S, have the same repetition rate but the S pulses lag by a period to establish enough power to overcome the load. In an overspeed condition, two S pulses are uninterrupted by an R pulse, the first S pulse causing the flip-flop 26 to switch to its D state, and the second S pulse passing through gate 18 to switch 24 to its A state. The next successive R pulse is not passed by gate 20 so that power is not turned on until two R pulses are uninterrupted by a S pulse. The output of state A may be used to apply reverse polarity to the motor for braking. The delay circuits 12, 14 may be replaced by advance circuits before the gates 18, 20. In another arrangement, a winding of the motor is connected between the mid-points of two polarities, one supplied with a constant voltage, and the other connected across the terminals B, C. This arrangement provides reversal of the voltage applied to the winding during an overspeed condition. The frequency comparator circuit may provide an output controlling an oscillator or other frequency generator, instead of an electric motor.
申请公布号 DE1289871(B) 申请公布日期 1969.02.27
申请号 DE1966S104625 申请日期 1966.07.05
申请人 SEQUENTIAL ELECTRONIC SYSTEMS INC. 发明人 S. SCHILLER, MICHAEL
分类号 H02P23/00;H03K5/26;H03K21/02 主分类号 H02P23/00
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