发明名称 RECEIVER
摘要 PURPOSE:To improve the sound quality while preventing beat disturbance and noise at the time of reception by providing a judging circuit judging whether or not the receiver is in the channel selection and stopping automatically the clock oscillation of a microcomputer at the end of channel selection. CONSTITUTION:When a key input device 12 is depressed, a preset data is supplied from a controller 8 to a PLL circuit 7 to attain the channel selection and a selected channel is displayed on a display device 13. Moreover, the output signal of an OR circuit 22 and an integration device 23 goes to a high level and the output signal of the integration device 25 goes also to a high level by a latch signal supplied from the controller 8 to the device 13. Thus, the output signal of a NOR circuit 24 and an integration device 26 goes to a low level and a transistor 21 is turned off. Thus, the clock oscillation is consecutive and when the channel selection is finished, the oscillation is stopped. Thus, beat disturbance and noise at reception are prevented and the sound quality is improved.
申请公布号 JPS63209318(A) 申请公布日期 1988.08.30
申请号 JP19870043433 申请日期 1987.02.26
申请人 SONY CORP 发明人 SATO KAZUHIRO
分类号 H03J7/18;H03J1/00 主分类号 H03J7/18
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