| 摘要 |
PURPOSE:To decrease the number of configuration transistors by constituting a decoder of logical circuit the same in number as output terminals, and constituting respective logical circuits of a pair of transistors complementarily opened and closed by a clock signal and a transistor controlled by first or second input terminals. CONSTITUTION:For example, when input signals D0 and D1 are both '0', (n) channel transistors n1 and n2 of a first logical circuit 1 are turned on and an output terminal 11 is shifted to a low level. Since second (n) channel transistors n4 and n6 and n8 of second and fourth logical circuits 2-4 are turned off, output terminals 12-14 stay at a high level. Hereinafter, in the same way, second (n) channel transistors n2, n4, n6 and n8 are selectively opened and closed in accordance with the voltage level of the input signals D0 and D1 and outputs X0-X3 are obtained. Since such logical circuits 1-4 are composed of three transistors, for a decoder circuit 15, four transistors can be decreased.
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