发明名称 TIME DIVISION MULTIPLEXING SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To branch and insert an arbitrary low-order group signal out of a high-order group signal by providing a circuit connecting a switch part and a selector part with a bus between a demultiplexer and a multiplexer in a circuit handling a synchronization multiplexing signal for which the time division multiplexing is executed. CONSTITUTION:A demultiplexer 10 separates a high-order group input signal to (n) pieces (n>1) of a low-order group signal (a). A branch processing circuit 13 is equipped with a switching part 14 to extract (m) pieces (1<=m<=n) of a branch low-order group (b) selected by a branch control signal from the low- order group signal (a). A signal C outputted to a data bus 17 by a switching part 14 is the same one as the inputted low-order group signal (a). An inserting processing circuit 15 is equipped with a selector part 16. the selector part 16, based on the given inserting control signal, replaces a low-order group signal C included in the high-order input signal to a part or all of l pieces (1<=l<=n) of a low-order group signal (d) to be inserted and outputs (n) pieces of a low- order group signal (e). The low-order group signal (e) is multiplexed by a multiplexer 11 and a high-order group output signal is sent.
申请公布号 JPS63207230(A) 申请公布日期 1988.08.26
申请号 JP19870039510 申请日期 1987.02.23
申请人 FUJITSU LTD 发明人 ISHIHARA TOMOHIRO;FUJIMOTO NOBUHIRO;KAWAI MASAAKI;WAKIZAKA TAKAAKI;WATABE HISAKO
分类号 H04J3/08 主分类号 H04J3/08
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