| 摘要 |
PURPOSE:To shorten a simulating time, by transferring an input signal string required for each real parts, performing a logical operation in each real parts in parallel, and transferring respective computed result to a software simulation comprehensively. CONSTITUTION:Input vectors 108 and 109 for integrated circuits A and B registered on a real parts event table are collected in one packet, and is transferred from a software logical simulator 101 to a real parts logical simulation device 102. The device 102 divides it into input circuits A and B, and drives two real parts 105 in parallel. After the simulation of the real parts being completed, and output vectors of the circuits A and B are collected in one packet consisting of 110 and 111, and it is transferred to the simulator 101. During that time, the simulator 101 waits the transfer of the calculation result from the device 102, and then it is transferred, registers the output vector on the event table. After that, the simulation of a software model is performed. In such a way, it is possible to perform the parallel operation of the real parts to be processed, and to accelerate processing speed. |
