发明名称 |
CHARGE TRANSFER DEVICE OUTPUT PROCESSING CIRCUIT |
摘要 |
PURPOSE:To resolve problems following a sample holding action by executing a prescribed processing to a transfer output including a reference level part and an information signal part within respective transfer periods in a time series without using a sample/hold circuit. CONSTITUTION:An image pickup output signal SV outputted from a solid-state image pickup element 11 is supplied through a buffer amplifying part 43 to a first delaying part 44. A first delaying part 44 has four output terminals to delay for a prescribed time and an image output SV and four above- mentioned delaying outputs SV1-SV4 from a buffer amplifying part 43 are supplied to a first non-adding mixing part 45. The first non-adding mixing part 45 forms a synthesizing information signal SVa having a level in accordance with a maximum amplitude level in respective information signal parts of the image pickup output signal SV and the delaying signals SV1-SV4 and sends it to a subtracter 46. To the subtracter 46, a synthesizing signal SRa of a reference level part obtained from a second delaying part 51 and a second non-adding mixing part 52 is supplied.
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申请公布号 |
JPS63206070(A) |
申请公布日期 |
1988.08.25 |
申请号 |
JP19870038847 |
申请日期 |
1987.02.20 |
申请人 |
SONY CORP |
发明人 |
YAMAMOTO ISAMU;IDE TAKASHI |
分类号 |
H04N5/335;H04N5/341;H04N5/365;H04N5/372;H04N5/378 |
主分类号 |
H04N5/335 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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