| 摘要 |
PURPOSE:To always accurately detect an abnormal lock stage by counting the oscillation output signals from a VXO (voltage control crystal oscillation circuit) and digitally detecting the abnormal lock state. CONSTITUTION:The abnormal lock is detected by a counter which counts the oscillation output signals from the VXO which oscilllates in a specified oscillation frequency. For example, the oscillation output signal of 3.58MHz from the VXO 11 is impressed on the clock terminals CL of D-FFs 18 and 19, constituting the counter 17, as a clock signal after divided into one-eighth in a one- eight frequency division circuit 16. The signal of 20fH obtained by dividing the oscillation output signal of 160fH from a VCO 21 into one-eighth in the one-eighth frequency division circuit 22 is impressed on the reset terminals R of the D-FFs 18 and 19 as a reset signal. In this case, the abnormal rock can be securely detected by counting the oscillation output signals from the VXO in a specifield period so as to detect 'L' in the case of a normal oscillation and detect 'H' in the case of the abnormal lock state. |
