| 摘要 |
PURPOSE:To improve the DC balance of a transmission signal by applying parallel/serial conversion to a parallel signal of (m+1)-bit at the sender side and sending the result to the reception side, using frame synchronizing detection at the reception side so as to apply serial/parallel conversion thereby reproducing an m-bit parallel signal. CONSTITUTION:The sender side adds an inverted bit C of the MSB(Dm) or the LSM(D1) to an m-bit parallel signal, generates an (m+1)-bit parallel signal per frame and the parallel signal is subjected to parallel/serial conversion and the result is sent to the reception side. The reception side detects that the inverted MSB (the inverse of Dm) or the inverted LSB (the inverse of D1) from the (m+1)-bit serial signal is equal to the inverted bit C added at the sender side to apply frame synchronizing detection thereby applying serial/parallel conversion and recovering the m-bit parallel signal. Thus, the transmission signal is equal to an mB1C code, the consecutive appearance of the same digit is suppressed at maximum to the (m+1)-bit and the duty ratio is suppressed from 1/(m+1) into m/(m+1) and the DC balance of the transmission signal is improved. |
