发明名称
摘要 PURPOSE:To detect easily the completion of coding by forming an instruction code representing the end of a page, storing it in an intermediate buffer memory and reading this instruction code from the intermediate buffer memory. CONSTITUTION:When a control circuit 3 detects the end of a page, that is, an ''L'' level of a page signal, the information whether it is the run length number of a while signal or a black signal and a value of a counter 2 are written at first in an intermediate memory (FIFO)5, an instruction code commanding a selector 4 to form a line synchronizing signal is selected and the instruction code is written in the FIFO memory 5 about 6 times consecutively, the selector 4 selects the instruction code representing the end of the page and writes the instruction code to the FIFO memory 5. The end of coding is detected easily by reading the instruction code from the FIFO memory 5.
申请公布号 JPS6342471(B2) 申请公布日期 1988.08.23
申请号 JP19820202979 申请日期 1982.11.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NISHINO YASUKAZU
分类号 H04L23/00;H04N1/41;H04N1/413;H04N1/417;H04N1/419 主分类号 H04L23/00
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