发明名称 GATE ARRAY SYSTEM SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To eliminate the need for formation in an input/output cell region of an input/output circuit exclusive for a test, and to use the input/output cell region efficiently by sharing an input/output circuit and changing over a memory circuit to a normal operation mode or a test mode. CONSTITUTION:A detecting signal is output when a signal detector detects a command signal commanding the test of a memory circuit 30, and a changeover circuit 33 changes over connection to the memory circuit 30 through a logic circuit 34 of an input/output circuit 31 or direct connection to the memory circuit 30 of the input/output circuit 31 in response to the detecting signal output from the signal detector. Consequently, the memory circuit 30 can be changed over to a normal operation mode or a test mode, sharing the input/output circuit 31. Accordingly, an input/output circuit 31 exclusive for a test need not be shaped in an input/output cell region, and other input/output cell regions can be used for the input/output of circuits except the memory circuit 30 while the memory circuit 30 can be tested.
申请公布号 JPS63202937(A) 申请公布日期 1988.08.22
申请号 JP19870036187 申请日期 1987.02.18
申请人 RICOH CO LTD 发明人 TSUKAGOSHI TOSHIHIRO;YASUI TAKASHI
分类号 H01L21/66;G11C11/412;G11C17/12;H01L21/82;H01L21/822;H01L27/04;H01L27/11;H01L27/118;H03K19/173 主分类号 H01L21/66
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