发明名称 DATA RECEPTION CIRCUIT
摘要 PURPOSE:To automatically attain resynchronization by providing a reseting means resetting a frame synchronizing signal extracting section and a gate signal generating means from the result of comparison by a comparison means so as to eliminate a meaningless data when the out of synchronism takes place. CONSTITUTION:If the synchronization from the frame synchronizing signal extration section 3 is unlocked, no synchronizing signal comes at the timing when an AND gate 8 opens its gate. Thus, no output comes from the AND gate 8. Thus, the difference from the output of the gate 8 by a normal synchronizing signal from the signal extraction section 3 is detected by a comparison section 9, and a pulse is generated from a pulse generating section 10 by the detection signal. A reset section 11 resets the signal extraction section 3, a counter 6 and a delay section 2 to bring the signal extraction section 3 and the counter 6 into the standby state. Thus, when the synchronizing signal comes again, all the circuits are activated to extract the normal synchronizing signal.
申请公布号 JPS63203032(A) 申请公布日期 1988.08.22
申请号 JP19870034505 申请日期 1987.02.19
申请人 FUJITSU GENERAL LTD 发明人 MIZUNO KAZUMI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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