发明名称 HIGH-SPEED PARALLEL MULTIPLICATION/DIVISION CALCULATOR
摘要 PURPOSE:To simultaneously process both the multiplication and the residue at a high speed by using the multipliers which divide both multipliers and multiplicands every prescribed number of bits to obtain each partial product and an adder which adds the outputs of these multipliers together. CONSTITUTION:The multiplicands A and the multipliers B are divided every 16 bits, for example and the partial products of these divided sections are obtained by multipliers 1-1-1-n respectively. That is, the partial products of Ai.Bi (i=1, 2...n) are obtained in parallel by those multipliers and then added together by an adder 2. Thus the parallel multiplication processes can be carried out at a high speed even with a large number of digits. Then the output of each multiplication is divided for each prescribed number of bits and then divided by a prescribed divisor. The residue tables 4-1-4-m which obtain the divided residues are retrieved for acquisition of partial residues. These partial residues are added together by an adder 5 for acquisition of the multiplication outputs.
申请公布号 JPS63200233(A) 申请公布日期 1988.08.18
申请号 JP19870031636 申请日期 1987.02.16
申请人 FUJITSU LTD 发明人 TORII NAOYA;AZUMA MITSUHIRO;AKIYAMA RYOTA
分类号 G06F7/52;G06F7/53;G06F7/535;G06F7/72 主分类号 G06F7/52
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