发明名称 ETCHING OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To provide a gate electrode with accurate shape and dimensions and obtain an FET with excellent characteristics by performing anisotropic etching of impurity-doped polycrystalline Si with an etching rate of less than 1000 Angstrom /minute. CONSTITUTION:An aperture is formed in an SiO2 layer 22 and a gate oxide film 23 is formed on a P<->type Si layer 21. A polycrystalline Si layer is built up and, after POCl2 is deposited, oxidized lightly in an O2 atmosphere at 1000 deg.C to improve the adhesiveness to resist and a resist mask is applied and a P-doped polycrystalline Si layer 27 is formed. Then anisotropic etching of the P-doped polycrystalline Si layer 27 which is to be a gate electrode is performed with an etching rate of less than 1000 Angstrom /minute by a CDE method while O2 is made to flow. With this method, the shape and dimensions of the P-doped polycrystalline Si electrode can be satisfactory. Subsequently, a MOS-FET can be completed with the excellent yield and characteristics.
申请公布号 JPS63200534(A) 申请公布日期 1988.08.18
申请号 JP19870032399 申请日期 1987.02.17
申请人 TOSHIBA CORP 发明人 USUKI KIICHI;TAKAHARA MASAKI
分类号 H01L21/302;H01L21/3065;H01L29/78 主分类号 H01L21/302
代理机构 代理人
主权项
地址