发明名称 HETERO JUNCTION BIPOLAR TRANSISTOR AND MANUFACTURE THEREOF
摘要 PURPOSE:To improve the characteristic of a collector top structure hetero junction transistor by increasing the resistance of the upper layer of a semiconductor layer of a laminated structure for forming the emitter layer of an external base region over its thicknesswise direction. CONSTITUTION:An n<+> type GaAs layer 2 which forms an emitter layer and an n-type GaAs layer 3 are formed on a GaAs substrate 1, and an n-type AlGaAs layer 4 having a larger band gap than the layers 2, 3 is formed. A p<+> type GaAs layer 5 which forms a base layer is formed on the emitter layer, and an n-type GaAs layer 6 which forms a collector layer is formed thereon. An external base region is formed as a high resistance layer 9 all in the thicknesswise direction in the part of the layer 4. That is, its bottom 10 is formed in depth arriving at the layer 3. Accordingly, since the base region has high hetero barrier for all electrons or holes, carrier injection to the layer 9 is less. Even if many defects are presented in the layer 4, a recombination current is less. Thus, a high current gain can be obtained.
申请公布号 JPS63200567(A) 申请公布日期 1988.08.18
申请号 JP19870032502 申请日期 1987.02.17
申请人 TOSHIBA CORP 发明人 MORITSUKA KOHEI
分类号 H01L29/73;H01L21/331;H01L29/205;H01L29/72;H01L29/737 主分类号 H01L29/73
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