发明名称 IMAGE DECODING CIRCUIT
摘要 PURPOSE:To shorten a decoding time by detecting an one-dimensional EOL (end of line), inputting a coding signal to plural pieces of decoders by sequentially switching every time when the one-dimensional EOL appears, and enabling the parallel operation of the respective decoders. CONSTITUTION:A code data from an input terminal 1 is supplied to a one- dimensional EOL detector 2. This detector 2 consists of an AND gate, an OR gate, a counter, etc., which detects a one-dimensional EOL from a code data and counts the number of lines, and transmits the number of lines and the detection information of one-dimensional EOL to a control circuit 8. The circuit 8 sequentially switch between a first decoder 3 and a second decoder 4 at every detection information of one-dimensional EOL and supplies a code data to them 3, 4, and thus controls the starting of the respective decoders 3, 4. A decoded data from the decoder 3 is outputted to a buffer 5 and that from the decoder 4 is to a buffer 6. And the decoded data are outputted from a decoded data output terminal 9 via an output circuit 7 in order from the buffer 5 and from the buffer 6.
申请公布号 JPS63198479(A) 申请公布日期 1988.08.17
申请号 JP19870029878 申请日期 1987.02.13
申请人 NEC CORP 发明人 ISHITOBI KIMIHIRO;SHIOJIRI HIROHISA
分类号 H04N1/419 主分类号 H04N1/419
代理机构 代理人
主权项
地址