| 摘要 |
PURPOSE:To remarkably decrease a current required for the linearity compensation of the characteristic by using two current multiplier circuits so as to form a compensating current kli being Kl times as much as an input (i) and suppressing a current consumed uselessly to obtain the current into a current nearly equal to be consumed in a 1st current multiplier circuit. CONSTITUTION:The same current as an emitter current IE=Bi/alpha of a transistor (TR) Q2 of an input section of a comparator is formed by the same dummy 6a of the bias circuit of the input circuit to be a current IE, multiplied (7) into 8IE, converted (8IE/beta) with 8 times by TRs Q81-88 constituting a current mirror together with a TR Q7 to obtain a current 64i. In using the linearity compensating circuit, a current of 9IE is enough to be given uselessly to TRs Q3, Q51-Q58 to obtain the same quantity of the compensating current 64i, and this value is decreased far smaller than a conventional method.
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