| 摘要 |
A linear output multiplier has two pairs of differentially connected multiplying transistors (T13, T14 and T15 T16). One value Vx to be multiplied is supplied to the differential inputs of differential amplifier 1 and converted to corresponding differential currents I1 and I2. These currents are supplied to semiconductor junctions which generate logarithmically distorted voltages representing the one value Vx which are applied to the control electrodes of the multiplying transistors. The second value Vy to be multiplied is supplied to the differential inputs of differential amplifier 2 and converted to corresponding differential currents I3 and I4. The outputs from amplifier 2 are connected respectively to the tail connections of the two differential pairs of multiplier transistors. The outputs of the multiplying transistors are cross-coupled to provide four quadrant multiplying functions. Zero signal offset errors due to device Vbe mismatch are corrected by injecting a current equal to the standing current of the differential amplifier 2 into the two outputs of the differential amplifier. This means that with zero differential input to the amplifier (Vy=0) no current flows through the multiplying transistors and the zero output condition is ensured. Furthermore, any residual errors for non-zero input signals are proportional to the applied input signal Vy. The injected currents are developed by an additional current source (T24, R24) and current mirror arrangement (T17, T18, T19, and T25).
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