| 摘要 |
PURPOSE:To make it possible to form a wide channel and to restrain hot carrier from generating, by forming, on the upper part of a MOS, a semiconductor layer exposing region and a region where the thickness of a surface insulating layer is gradually increased, and forming a P<-> region and N<-> region by ion implantation. CONSTITUTION:A gate electrode 4 is formed on a semiconductor substrate 1 via a gate oxide film 3, and a side-wall 5A composed of an insulative film is formed on both side-walls of the electrode 4. By applying these to a mask, P-type impurity ion is implanted, and a source.drain ion implantation region 6 is formed. After an insulative film 8 is formed on the surface of the substrate 1, a semiconductor layer 9A in which N-type impurity is doped and an insulative layer 10 are formed. After a resist 11 is flatly spread on the substrate 1, the layer 10 and the resist 11 are subjected to etching with the same speed till the surface of the layer 9A is exposed, and a semiconductor layer exposing region 14 and an insulative film thickness decrease region 15 are formed. The latter is a region in the periperal part of the former, and the thickness of the layer 10 is made gradually thin. After the resist is eliminated, P-type impurity ion is implanted, and a P<-> region 16 and an N<-> region 17 are formed in a region 14 and the layer 9A under the region 15, respectively.
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