发明名称 VERTICAL C-MOS FIELD-EFFECT TRANSISTOR
摘要 PURPOSE:To increase the degree of integration, by a method wherein after a p-type and an n-type semiconductor islands are formed on a semiconductor film on an insulative substrate, and an field insulating film is formed thereon, a gate insulating film and a gate electrode are formed on the boundary surface between islands. CONSTITUTION:On the surface of an Al2O3 substrate 1, a single crystal Si film is grown by epitaxy, and islands of an n-type Si 2, a p-type Si 3, etc., are formed by ion implantation and the like, on which a field SiO2 is grown. After the boundary surface between Si 2 and Si 3 is subjected to photoetching from the surface of the field 4, and a gate SiO2 5 is formed on the side surfaces of Si 2 and Si 3 by thermal oxidation, an electrode 6 is formed by burying polycrystal Si or W and the like. Thereby, the degree of integration can be increased by a factor of about two as compared with a lateral C-MOS FET.
申请公布号 JPS63197367(A) 申请公布日期 1988.08.16
申请号 JP19870030138 申请日期 1987.02.12
申请人 SEIKO EPSON CORP 发明人 IWAMATSU SEIICHI
分类号 H01L21/8238;H01L27/092;H01L29/78;H01L29/786 主分类号 H01L21/8238
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