发明名称 HYBRID INTEGRATED CIRCUIT
摘要 PURPOSE:To lessen the component of the lead inductance of a capacitor pattern, to prevent the lowering of a gain and to improve a frequency characteristic by a method wherein a hybrid integrated circuit is constituted into a multilayer structure with an emitter feedback resistor and a thick film peaking capacitor is provided. CONSTITUTION:An emitter film resistor 20 is formed between an emitter electrode 10 of an emitter resistance feedback transistor amplifier and an earthing electrode pattern 30 of a surface pattern and moreover, a dielectric film 50 is formed on the emitter electrode 10, the emitter film resistor 20 and the earthing electrode pattern 30, an upper electrode 40 of a thick film capacitor, which is provided on the upper side of the dielectric film 50 and shares a connection surface with part of the pattern 30, is formed and an emitter peaking capacitor is simultaneously formed in parallel to the emitter resistor. Thereby, the component of the lead inductance of the pattern is lessened and the lowering of a gain can be prevented.
申请公布号 JPS63196069(A) 申请公布日期 1988.08.15
申请号 JP19870028502 申请日期 1987.02.09
申请人 NEC CORP 发明人 TANAKA KUNITSUGU
分类号 H01L27/01;H01G4/40;H05K1/16 主分类号 H01L27/01
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