发明名称 CODER AND DECODER
摘要 PURPOSE:To adjust the total sum of deviation between the gain of a CODEC and the gain of other circuit device without the provision of other circuit by providing a nonvolatile adjusting circuit including a matrix array of rewritable nonvolatile storage elements in a form using a digital input terminal of a decoder in common as the input terminal of an address designation signal. CONSTITUTION:In the titled device, a coder 3 and a decoder 4 are connected respectively to an analog input terminal 1 and an analog output terminal 2 respectively, and an output register 7 and an input register 8 are inserted respectively between the coder 3 and a digital output terminal 5 and between the decoder 4 and a digital input terminal 6. Moreover, the titled circuit consists of a reference voltage generating circuit 9 supplying a reference voltage to the coder 3 and the decoder 4, and a nonvolatile fine adjusting circuit 11 including a matrix array of rewritable nonvolatile storage elements adjusting an output voltage of the reference voltage generating circuit 9 externally and writing a desired adjusting signal output pattern by using an address designation signal from a digital input terminal 6 in common use with an address designation signal input terminal and a write signal from an external write terminal 10. The terminal 12 is used for write/read switching to the nonvolatile adjusting circuit 11.
申请公布号 JPS63196121(A) 申请公布日期 1988.08.15
申请号 JP19870028511 申请日期 1987.02.09
申请人 NEC CORP 发明人 OGASAWARA KAZUO;SHIBATA TORU
分类号 H03M1/00 主分类号 H03M1/00
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