发明名称 |
ORDER STORAGE CONTROL CIRCUIT |
摘要 |
PURPOSE:To always secure a state where the order storage is fixed by providing a circuit which detects that the order stored in an order storage control circuit is unfixed. CONSTITUTION:A latest area detecting circuit 5 consists of 3-input NAND circuits B1-B4; while an oldest area detecting circuit 6 consists of 3-input NAND circuits B5-B8. Then an area unfixed state detecting circuit 7 consists of NAND circuits B9-B11. An oldest area setting circuit 8 which sets forcibly the oldest area in a state where the oldest or latest state does not exist consists of NOR circuits C1-C3, an inverter A7 and a NAND circuit B12. An order replacement circuit 9 which rewrites forcibly a 6-bit memory circuit storing the order storage of areas in a state where the oldest or latest area does not exist consists of an AND circuit D1 which inputs a write signal phiwe and the output of the circuit 7 and an inverter A8.
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申请公布号 |
JPS63195753(A) |
申请公布日期 |
1988.08.12 |
申请号 |
JP19870029292 |
申请日期 |
1987.02.09 |
申请人 |
NEC IC MICROCOMPUT SYST LTD |
发明人 |
ASAI HIDEYASU;ECHIGOYA KENICHI |
分类号 |
G06F12/08;G06F12/12 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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