发明名称 MEMORY DIAGNOSING SYSTEM
摘要 PURPOSE:To shorten a memory diagnosing time by writing data to all memory banks at one time at the time of a memory diagnosis. CONSTITUTION:This device consists of a CPU 3, a bank selection circuit 1 and memory banks 21-2n. When the CPU 3 diagnoses the banks 21-2n, an input 102 of the circuit 1 is set at an L level by the CPU 3. Thus all outputs 11-1n of the circuit 1 are set at L levels and all banks 21-2n receive accesses. Then data are written to all banks 21-2n at one time. Then the CPU 3 sets the input 102 at an H level and sets the combination of the input 101. The CPU 3 selects successively the banks 21-2n to read out data and compares this read-out data with the write data for diagnosis. In such a way, the memory diagnosing time is shortened.
申请公布号 JPS63195758(A) 申请公布日期 1988.08.12
申请号 JP19870028524 申请日期 1987.02.09
申请人 NEC CORP 发明人 KIKUCHI TORU
分类号 G06F12/16 主分类号 G06F12/16
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