发明名称 |
I/O CONTROLLER WITH A DYNAMICALLY ADJUSTABLE CACHE MEMORY |
摘要 |
<p>A controller I/O (20) for transferring data between a host processor (10) and a plurality of attachment devices (16) comprises a cache memory (42) provided for storing blocks of data which are most likely to be needed in the near future. When transferring data to cache memory (42) from an attachment device (16), additional unrequested information can be transferred at the same time if it is likely that this additional data will soon be requested. Further memory (47) includes a directory table wherein all data in cache memory (42) is listed at a <<home>> position and, if more than one block of data in cache memory (42) have the same home position, a conflict chain is set-up so that checking the contents of the cache memory (42) can be done simply and quickly.</p> |
申请公布号 |
EP0066766(B1) |
申请公布日期 |
1988.08.10 |
申请号 |
EP19820104517 |
申请日期 |
1982.05.24 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DIXON, JERRY DUANE;MARAZAS, GERALD ALLAN;MERCKEL, GERALD ULRICH;MCNEILL, ANDREW BOYCE |
分类号 |
G06F12/08;G06F13/12;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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