发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To increase only the thickness of an inter-layer insulating film just under a wiring substantially, and to reduce capacitance parasitized to the wiring without lowering the opening yield of a contact hole by each forming a polysilicon resistance layer and a polysilicon layer patterning-shaped through the same process onto a field insulating film. CONSTITUTION:A polysilicon resistance layer 5 and a polysilicon layer 11 patterning-formed through the same process and an inter-layer insulating film 6 coating the whole surfaces of the polysilicon resistance layer 5 and the polysilicon layer 11 are each shaped onto a field insulating film 4 except a semiconductor-element forming region 3 in a semiconductor substrate 1. Accordingly, since only the inter-layer insulating film just under a wiring is formed in size substantially thicker than conventional devices only by the thickness of the left polysilicon layer 11, capacitance parasitized to the wiring is minimized only by the thickness section, and a contact hole 7 may be bored only to the inter-layer insulating film 6 in the same manner as conventional devices, thus also preventing the lowering of the opening yield of the contact hole.
申请公布号 JPS63192249(A) 申请公布日期 1988.08.09
申请号 JP19870025784 申请日期 1987.02.05
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 TAKAMORI KAZUO
分类号 H01L23/52;H01L21/3205;H01L21/822;H01L27/04 主分类号 H01L23/52
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