发明名称 DISPLAY UNIT USING SERIES/PARALLEL ACCESS MEMORY
摘要 <p>A video display system includes a video display and a video signal input for instantaneously determining the brightness and/or color of the display on a screen. A bit-mapped video memory includes a plurality of memory arrays each including a plurality of rows and columns of read and write memory cells, a circuit for accessing the array by two separate data ports,, one port having a register providing a serial input, the other port being a bit-parallel input port for accessing the array for parallel read and write. The array can be accessed by means of addressing circuitry. A shift register is connected to receive, in respective bit portions, outputs of respective ones of said plurality of memory arrays and deliver said outputs for conversion to an analog video signal for display on said screen. A microprocessor has parallel data and address busses for supplying addresses to the addressing circuitry and for accessing the data in said array via said bit-parallel port to update the video information in the bit-mapped memory.</p>
申请公布号 JPS59131979(A) 申请公布日期 1984.07.28
申请号 JP19830181793 申请日期 1983.09.29
申请人 TEXAS INSTRUMENTS INC 发明人 KEBIN SHII MATSUKUDONOUGU;DEBITSUDO SUMISU RAFUITSUTOU;JIYON EMU HIYUUZU
分类号 G06F12/00;G06F3/153;G06F12/04;G06F12/06;G06F19/00;G06T1/60;G09G5/00;G09G5/02;G09G5/36;G09G5/377;G09G5/39;G09G5/393;G09G5/395;G11C7/00;G11C11/401 主分类号 G06F12/00
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