摘要 |
PURPOSE:To obtain an excellent emitter coupling type FF whose operating speed is high, by constituting it so that it can be set by a timing of a correct set pulse, even in case when a set pulse and a reset pulse are superposed. CONSTITUTION:When a set pulse S is inputted to a transistor (Tr) Q5, a Tr Q6 and a Tr Q7 for constituting a differential pair are electrified and becomes non-conducting, respectively. Accordingly, in this case, even if a reset pulse R input is in an H level, Trs Q2, Q3 for constituting an FF and a reset use Tr Q4 become both non-conducting. As a result, an inversion output Q becomes an L level, and a non-inversion output Q becomes an H level. Therefore, even if a trailing edge of the reset pulse R is further delayed than a leading edge of the set pulse S, it is set at the time of the leading edge of the set pulse S, the non-inversion output Q becomes an H level, the inversion output Q becomes an L level, and a normal operating state can be held. Also, it does not occur that the reset pulse R is delayed excessively by a gate, therefore, an operation can be executed at a high speed.
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