| 摘要 |
PURPOSE:To increase the working speed of a memory by dividing the requesters into groups based on the information output timing of each requester and adding a circuit to each group to produce the timing signal needed for a memory element. CONSTITUTION:When a reading job is carried out by the information sent from an external device 1a in timing C, a RAS signal RAS1 and a CAS signal CAS1 are delivered from a timing signal generating circuit 4a via a signal switching circuit 5 in the optimum timing so that the standard of a memory element 6 is satisfied. In case the row address information is delivered prior to various information with an access given from an external device 1c, an element control part 3b controls a timing generating circuit 4b so that a RAS signal is outputted first from the circuit 4b like RAS2 to the element 6 in the timing B and then the CAS signal is delivered in the timing D after reception of the column address information fixed later. As a result, the read information can be obtained in the timing F before the device 1a obtains the read information. Thus the reading speed is increased to the device 1c.
|
