| 摘要 |
PURPOSE:To prevent the increase in threshold voltage value due to impurities, by embedding insulating layers in the lower parts of grooves formed in the surface of a silicon semiconductor substrate, embedding semiconductor layers having the same conductivity type as that of the upper parts of the grooves, and electrically isolating elements. CONSTITUTION:Insulating films 3 are embedded in the lower parts of grooves formed in the surface of a p<-> type semiconductor substrate. P-type polycrystalline silicon films 8 are embedded in the upper parts of the grooves 2. Thus elements are isolated. Not only the same element isolating characteristic as that of a conventional semiconductor is obtained, but also intrusion of impurities into the channel region of a transistor can be eliminated. Therefore, the width of the gate of the transistor becomes the length determined by the element isolating region. Increase in threshold voltage can be prevented even in the transistor, in which especially short gate width is required. An impurity region is formed in an independent step in a conventional method. Since the impurity region, i.e., the polycrystalline silicon film 8, is formed in the groove 2, however, any independent impurity introducing step is not required.
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