| 摘要 |
PURPOSE:To improve an integrity by a method wherein memory cells are arranged into a matrix and at least one memory cell is composed of a p-n junction to reduce the area of one memory cell and to improve the degree of freedom of a program by a method wherein a process which determines the content of the program is provided at the nearly final stage of a manufacturing process. CONSTITUTION:Row address input lines 5 are composed of n-type diffused layers 4 and column address input lines and data lines 6 are composed of aluminum alloy layers 3 to form a matrix. When a datum is read out, the row address line 5 is at a common potential and the column address input line and the data line 6 is at a positive potential. If a p-n junction exists, a forward current is applied and, if a p-n junction does not exist, no current flows. Those two conditions correspond to data '1' and '0' respectively. At that time, the row address lines 5 and the column address input lines and data lines 6 which are not read out are at a positive potential and a common potential respectively. Therefore, even if there is a p-n junction, only a backward current flows and that current is too small to be detected so that non-selected memory cells can be protected from current application. |
