| 摘要 |
PURPOSE:To reduce the waiting time by providing an address latch and a data latch on each address and each data port, respectively, holding an address of an access request and a write data in each latch, when its request has conflicted between ports, and executing a write operation to a memory after other request has been processed. CONSTITUTION:Address latching circuits 31-33 are provided between an address selector 12 connected to a memory 11 of a multi-port memory device 7 and each address port 8-10, and a memory control part 22 controls the circuits 31-33 through control lines f1-f3. Also, between data ports 13-15 and write data use drivers 16-18, write data latching circuits 34-36 are provided, and the circuits 34-36 are controlled through memory control lines d1-d3. In this state, when an access request from some port and a request of other port have conflicted, an address of the request and a write data are held in the respective circuits 31-33 and 34-36, and the control part 22 operates write to the memory 11 after other request has been processed.
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