| 摘要 |
PURPOSE:To test a cell by a line unit, and to shorten its time by providing a register for holding the information of one line portion of a selected and amplified storage cell string, and a means for detecting the coincidence of the held readout information of one line portion, and expected information of the readout information of one line portion of the cell string. CONSTITUTION:At the time of a '0' readout test of a cell, one line of '0' is selected and amplified 10, '0', and '1' are obtained in bit lines 18a, 18c and 18b, 18d, respectively, and sent to a register 12 by a signal DT. Subsequently, by selecting a signal TC '0', and parallel write complementary information, a parallel signal TD is held in a high potential. When a pair of bit lines 18a, 18b are erroneous, a transistor Q3 becomes on and the signal TD becomes a low potential. At the time of a readout test of a cell '1', a signal TC for selecting a line of '1', and information PRID are set to '0', and '1', respectively, and in case of correct readout, Q3 and Q7 become OFF and the signal becomes a high potential, and in case of erroneous readout, Q3 becomes on and becomes a low potential. In such a way, the cell test can be executed in a lump by one line each, and the inspection time can be shortened. |
