| 摘要 |
PURPOSE:To attain the interleave coding/decoding having a different interleave length by providing an address generating circuit outputting a write high-order address, a read-order address and a write/read low-order address and using an address conversion ROM. CONSTITUTION:The titled device inputs a reference address 103 and a symbol address 104 and comprises the 1st, 2nd and 3rd address generating circuits outputting a write high-order address 106, a read high-order address 107 and a write/read address 113. Thus, the capacity of the memory 105 is saved and a table conversion ROM is used for the 1st, 2nd and 3rd address generating circuits and the content of the ROM is changed with the same hardware constitution to realize the interleave/de-interleave with a different interleave length.
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