| 摘要 |
<p>PURPOSE:To reduce a quantity of hardware and to lower power consumption, by controlling an operating clock frequency which controls the cycles of the arithmetic processing and the control processing operations of a microprocessor with a hardware and a software. CONSTITUTION:The titled device is provided with a function capable of controlling the operating clock frequency with the software and the hardware by adding a clock frequency control part 2 on a conventional microprocessor. By frequency-dividing the operating clock frequency, for example, to 1/10<4> by the software and the hardware, one machine cycle goes to 10ms, and it is possible to realize a queue state of one second by an instruction with a machine cycle of 10<2>. Afterwards, when a high speed processing is required, it can be responded by reducing a frequency-dividing ratio and changing the operating clock frequency to a high value. Thus, the reduction of the machine cycle of the processing causes the reduction of the power consumption of the device because the microprocessor is constituted with a CMOS. Also, the frequency-divided ratio can be set arbitrarily.</p> |
