| 摘要 |
<p>PURPOSE:To attain a compact circuit, a low cost and a low power consumption by controlling a memory for storing a chrominance signal by a control circuit output controlling a memory storing a luminance signal and latching a signal read from the memory of the chrominance signal with the clock of the same phase as the sampling clock of the chrominance signal. CONSTITUTION:On the chrominance signal, the memories 4-6 are controlled by the memory control circuit 7 of the luminance signal and the memory control circuit 7 is shared to reduce a circuit scale. Since the memory control circuit 7 operates at twice speed with respect to data rate in the case of the chrominance signal by sharing the memory control circuit 7, the same data is stored on the address of two different memories. Then, the chrominance signal read from the memory has successive forms of the same data at the same data rate as the luminance signal by every two-set. Then, the data of the outputted chrominance signal is latched by operating latches 10, 11 with the sampling clock CCK of the chrominance signal to return to the data rate and the data arrangement of a normal chrominance signal. Thereby, the memory control circuit exclusively using by the luminance signal and the chrominance signal, respectively is shared and the circuit scale can be reduced.</p> |
