| 摘要 |
PURPOSE:To make layout design possible in a short time and with high efficiency, by using a hierarchical layout system in which a processing is performed in the order of rough layout, block layout and chip layout. CONSTITUTION:In the stage of rough layout, the relative arrangement of each function block and the temporary wiring path between the blocks are determined, under the consideration of electrical and thermal influences at the time of LSI operation, while the forms of function blocks are not yet decided. When the block layout is finished, the forms of all function blocks are decided. In the process of chip layout based on the above result, some discrepancies against the relative arrangement of the function blocks initially decided occur, but the temporary wiring path at the time of rough layout can be reproduced by chip layout decision means. Therefor, the initial wiring path can be obtained, in which electrical and thermal influences are taken into account. Thereby, a consistent automatic design is enabled, which completes a total mask pattern from the stage of temporary form evaluation of blocks, and the layout design of LSI can be done in a short time and with high efficiency.
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