发明名称 COUNTING CIRCUIT
摘要 PURPOSE:To simplify a circuit constitution by providing a specific circuit including a toggle flip-flop circuit and a multiplexer operated by a mode signal. CONSTITUTION:A reset signal, the inverse of RESET is inputted, '1' is initialized at an output, Q of a toggle flip-flop circuit 1, and '0' is initialized to the output of Q of set/reset flip-flop circuits 2, 10. When a mode signal (A=0, B=1) is set, the output G2 of a NOR gate 4 goes to '0' and the output G3 of a NAND gate 5 goes to '1' and the output G4 of a NOR gate 6 goes to '0'. The circuit 10 is set by detecting the trailing by the initial input signal, the inverse of C and a detection signal D is generated. In the mode of A=1, B=0, the output G4 goes to '0' by the signal, the inverse of C. The output G7 goes to '0' by the next signal, the inverse of C synchronously with its trailing and when the signal, the inverse of C is inputted twice, the circuit 10 is set. and a signal D is outputted. Thus, the circuit constitution is simplified.
申请公布号 JPS63180218(A) 申请公布日期 1988.07.25
申请号 JP19870012672 申请日期 1987.01.21
申请人 NEC CORP 发明人 HIRANO SHINICHI
分类号 H03K23/00;H03K23/58;H03K23/66 主分类号 H03K23/00
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