发明名称 DIAL PULSE SUPERVISING CIRCUIT
摘要 PURPOSE:To lighten the burden on a CPU by reading out a dial only when the CPU receives the interruption of dial receiving termination from a dial termination detection part. CONSTITUTION:A pulse counter 1 converts a dial pulse into binary code data. An interdigit supervisory part 2 reads interdigit with a clock as reference, and generates a signal for writing binary code into a pre-input and pre-output memory FIFO 4. With repeating it, binary data of the dial is accumulated in the FIFO 4. If write digit numbers into the FIFO 4 reaches a value which a digit number setting part 5 has previously set, a dial termination detection part 3 interrupts the CPU 6, which receives the dial. Thus, the CPU executes reading only when it receives interruption, whereby the burden on the CPU can be lightened.
申请公布号 JPS63180290(A) 申请公布日期 1988.07.25
申请号 JP19870012875 申请日期 1987.01.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TAKEMASA ATSUSHI
分类号 H04Q1/32 主分类号 H04Q1/32
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