发明名称 COMPUTER SYSTEM
摘要 <p>PURPOSE:To reduce power consumption and to miniaturize a back-up power source and to reduce the cost of a computer system by using a clock control circuit which controls the action clock applied to a CPU based on the detection of a prescribed input in addition to a clock generating circuit and the CPU. CONSTITUTION:When a commercial power supply is interrupted, a back-up power source 2 starts the energizing. Then the interruption of the commercial power source is detected at one of input points 9-1-9-m. A signal obtained based on said detection is fetched by an input detecting part 50 and the data showing the cut-off of the commercial power supply is given to a control part 30. Thus a CPU 31 sends said data to a center via a MODEM, a network control part NCU and transmission line 7. When the transmission is over, an action end signal is applied to one of those points 9-1-9-m. The part 50 sends the signal of an L level to a signal line 11 owing to said action end signal. As a result, an AND gate 8 is closed and the supply of an action clock is stopped to the CPU 31. Then a low power consumption mode is secured.</p>
申请公布号 JPS63180121(A) 申请公布日期 1988.07.25
申请号 JP19870011258 申请日期 1987.01.22
申请人 TOSHIBA CORP 发明人 HOSAKA YUKIO
分类号 G06F1/32;G06F1/00;G06F1/04 主分类号 G06F1/32
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