发明名称 TIME DIVISION MULTIPLEXER
摘要 PURPOSE:To arbitrarily modify the destination of a data by providing a means to synchronize the frames of data on respective data buses and the channels and to switch data between arbitrary data buses. CONSTITUTION:Respective line interfaces 100, 200, 300 temporarily store received data from transmission lines 421, 422, 423 in buffers 101, 201, 301, and output the data onto data busses 10, 20, 30 in accordance with timing signals supplied from a timing bus 4. Low speed side interfaces A, B...J, K...P, Q... also stored the input data in their respective internal buffers, and output the data onto respective data 1, 2, 3 in accordance with supplied timing clocks. Also, the data switching circuit executes the passing of data between respective data buses in accordance with timing signals supplied from a timing bus 4.
申请公布号 JPS63180235(A) 申请公布日期 1988.07.25
申请号 JP19870012800 申请日期 1987.01.22
申请人 SUMITOMO ELECTRIC IND LTD 发明人 NISHIHARA TSUTOMU
分类号 H04J3/00 主分类号 H04J3/00
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