| 摘要 |
PURPOSE:To read out desired variable length data at a high speed when a variable length data instruction is executed by adding a data buffer similar to that of a basic instruction processor to a variable length data instruction processor. CONSTITUTION:It is first decided whether the variable length data is equal to zero or not when the desired processing data is read out before a variable length data instruction is processed. If the variable length data is not equal to zero, a read request is outputted to a cache memory 101 from a data request part 21. When the request data is set at a data buffer DB51, +1 is given to the write address of the part 21 and the request data is stored in a 2nd register 14. Then the request data is outputted to a variable length data instruction processing part 15 from the register 14. In case the data read out by a request is shorter than the data needed for processing of the instruction, a read request is outputted to the memory 101 from the part 21. Then the data processing is started when the variable length data is equal to zero.
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