| 摘要 |
<p>PURPOSE:To simply send a data content deciding signal by providing the titled circuit with a mode register for outputting a serial clock sending inhibiting signal when a shift register is executing its shifting operation and a gate circuit for stopping the sending of a serial clock in accordance with the serial clock sending inhibiting signal. CONSTITUTION:The titled circuit is constituted of a serial clock forming circuit 3 for forming a serial clock for transferring serial data, the shift register 6 for executing the shifting operation based on the serial clock, the mode register 4 for outputting a serial clock sending inhibiting signal when the shift register 6 is executing the shifting operation, and the gate circuit 5 for stopping the sending of the serial clock in accordance with the serial clock send inhibiting signal. Since the mode capable of sending serial data under the status inhibiting the sending of the serial clock is formed, a content deciding signal for the kind of serial data can be simply sent.</p> |
