发明名称 DESIGN SUPPORT SYSTEM
摘要 PURPOSE:To reduce the capacity of a memory by adding an interference list to a variable memory to sow the interferences among reference tracks on wiring surfaces and an interference deleting means to a fixed memory to decide the wiring routes of interferences. CONSTITUTION:A processor 1 reads a pattern wiring/interference deleting program 72 out of a fixed memory 7 and then a parts list, circuit connecting information, etc., out of a read file memory 3 to decide the layout of parts on a wiring surface 81 of a variable memory 8. Then the connection of circuits having the same signal levels is selected by the program 72 for decision of the surface 81 suited to the signal level of the relevant circuit connection. Thus a tentative wiring route is decided by a wiring program using the surface 81. Then it is checked by the program 72 whether pattern wiring is included or not in the interference points of other wiring surfaces. If all wiring routes are not decided yet, the circuit connection of another signal level is selected for decision of a wiring surface 82. In such a way, the memory capacities corresponding to both surfaces 81 and 82 are provided to the memory 8. thus the memory capacity can be reduced.
申请公布号 JPS63177269(A) 申请公布日期 1988.07.21
申请号 JP19870009628 申请日期 1987.01.19
申请人 FUJITSU LTD 发明人 KO RENRI
分类号 H05K3/00;G06F17/50 主分类号 H05K3/00
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