发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 PURPOSE:To realize a high-speed access time and to avoid a wrong writing action by using a connection logic circuit inputting a control signal supplied from the outside at an ECL level. CONSTITUTION:A memory cell array M-ARY contains memory cells including a MOSFET arranged in a grid form. A memory peripheral circuit contains a bipolar MOSFET and a complementary MOSFET. A timing control circuit TC which generates a prescribed internal control signal without converting a prescribed control signal supplied from the outside at a TTL level or the ECL level into a signal level of the MOSFET. In such constitution, a prescribed internal control signal is produced with no intervention of a level converting circuit having a comparatively large delay time. Thus the access time is obtained at a high speed for a bipolar CMOS type RAM and at the same time a wrong writing action caused by sharing an input/output terminal can be avoided.
申请公布号 JPS63175291(A) 申请公布日期 1988.07.19
申请号 JP19870005950 申请日期 1987.01.16
申请人 HITACHI LTD 发明人 KONO KAYOKO;MIYAOKA SHUICHI;ODAKA MASANORI;OGIUE KATSUMI;TATENO MINORU
分类号 H03K19/0175;G11C11/34;G11C11/407;G11C11/413;G11C11/414;H03K19/00 主分类号 H03K19/0175
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