发明名称 |
Time switch with a dual memory structure-type control memory |
摘要 |
A time switch with a dual structure-type control memory utilizing a time division time switch. The switch is equipped with a speech memory unit into which digital signals to be interchanged are temporarily written, and a control memory unit into which addresses to be accessed by the speech memory unit are written. The control memory unit has first and second memories. Each memory has an input/output section connected to a memory controller. The memories are set during hard and soft cycles so that when either one of the memories is set in a hard cycle the other memory is set in a soft cycle. The hard cycle is a speech-control data read-only mode. The soft cycle is a speech-control data read-write mode under control from the memory controller.
|
申请公布号 |
US4759010(A) |
申请公布日期 |
1988.07.19 |
申请号 |
US19870007037 |
申请日期 |
1987.01.27 |
申请人 |
NEC CORPORATION |
发明人 |
MURATA, HATSUHO;HIRATA, HIDEYUKI |
分类号 |
H04Q11/04;H04Q11/08;(IPC1-7):H04J3/24 |
主分类号 |
H04Q11/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|