发明名称 On chip voltage regulator for common collector matrix programmable memory array
摘要 A programmable memory includes a voltage regulator (32) which is disposed between the supply voltage and the matrix supply line (10) for programmable memory cells. Each of the memory cells is comprised of a transistor (12) and a series fusible link (16). By maintaining a constant voltage on the matrix supply line (10), transients on the supply pin of a memory chip cannot cause spurious changes in the logic state of the memory cell resulting from parasitic capacitance (28).
申请公布号 US4758994(A) 申请公布日期 1988.07.19
申请号 US19860820286 申请日期 1986.01.17
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 BHUVA, ROHIT L.
分类号 G11C17/08;G11C5/14;G11C17/06;G11C17/12;G11C17/14;G11C17/18;(IPC1-7):G11C17/00 主分类号 G11C17/08
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