发明名称 PLURAL INPUT PICTURE EDITION RECORDING SYSTEM
摘要 PURPOSE:To store simultaneous events into a single recording medium as events occurred in parallel by combining plural picture memories in parallel so as to select an optional picture among plural input pictures and storing the result in one picture. CONSTITUTION:The 1st-n-th picture edit means 21, 22,...2n and a picture memory read address conversion means 5 reading the stored information in the picture memory 3 of n-set of picture edit means, reducing and arranging the information into the size of 1/n of one picture are provided. The 1st-n-th picture edit means 21, 22,...2n are provided respectively with the 1st-n-th picture information luminance/chrominance separation circuits 212, 222,...2n2, interpolation circuits 213, 223,...2n3, 214, 224,...2n4 and picture memories 215, 225,...2n5 storing the output information of the interpolation circuits. Thus, m-set of optional simultaneous events are displayed on one screen of a CRT 8 with reduction. That is, plural events progressed simultaneously are monitored.
申请公布号 JPS63175583(A) 申请公布日期 1988.07.19
申请号 JP19870007820 申请日期 1987.01.14
申请人 NEC CORP 发明人 KANEKO YOSHITAKA
分类号 H04N5/265;H04N5/262;H04N7/18 主分类号 H04N5/265
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