发明名称 Simplified synchronous forward/backward binary counter
摘要 In a binary counter made using the I2L technique, the realization of different gate types is complicated, because only NAND gates can be obtained directly. According to the invention, a particular circuit construction is indicated, which is constructed according to the I2L technique, is very simple and requires only a few gate transit times so that a comparatively high switching speed can be attained. In the circuit construction of the invention, both the flipflops and their associated combinatorial networks are fabricated in the I2L technique, using only NAND gates. Nevertheless, because of the particular circuit configuration of the invention, all of the necessary internal signals can be generated in an efficient manner.
申请公布号 US4759044(A) 申请公布日期 1988.07.19
申请号 US19860945423 申请日期 1986.12.22
申请人 U.S. PHILIPS CORPORATION 发明人 HOEVELMANN, RAINER
分类号 H03K23/00;H03K23/56;(IPC1-7):H03K21/02 主分类号 H03K23/00
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